SMARC module – the high-performance low-power standard
Perfect solution for size, weight, power and cost-optimized AI applications at the rugged edge
SMARC 2.1 wurde am 23. März 2020 veröffentlicht und ist ein Computer-On-Module-Formfaktor, der vom SGET-Konsortium gehostet wird.
congatec ist Editor der SMARC 2.0 und SMARC 2.1 Spezifikation.
SMARC 2.1 wurde am 23. März 2020 veröffentlicht und ist ein Computer-On-Module-Formfaktor, der vom SGET-Konsortium gehostet wird.
congatec ist Editor der SMARC 2.0 und SMARC 2.1 Spezifikation.
Highest interface-per-watt ratio of all COM standards
Facts, features and benefits of SMARC module
| Facts | Features | Benefits |
| Vendor independent standard | SMARC modules are available from many different vendors, all exchangeable within the same pin-out and footprint | Increased availability and reliable multi-sourcing strategy reduce cost, improve production scalability, and boost resilience against supply chain issues |
| Processor and SoC agnostic | SMARC modules can host low-power x86 as well as powerful Arm SoCs from different vendors | SMARC modules can host low-power x86 as well as powerful Arm SoCs from different vendors |
| Support of embedded vision and IoT centric interface technology | SMARC modules support up to 4x camera inputs and 4x GbE with TSN as well as optional wireless communication | Future-oriented interface technology for an extra-long application lifecycle without bottlenecks in data transfer rates |
| Reliable connector technology | SMARC modules feature the common MXM 3.0 connector designed for dedicated graphics cards in notebooks | The 314 pin connector features a highly proven technology with a broad supporter base and cost-optimized market offerings for highest reliability and cost efficiency |
| Facts | Features | Benefits |
| Vendor independent standard | SMARC modules are available from many different vendors, all exchangeable within the same pin-out and footprint | Increased availability and reliable multi-sourcing strategy reduce cost, improve production scalability, and boost resilience against supply chain issues |
| Processor and SoC agnostic | SMARC modules can host low-power x86 as well as powerful Arm SoCs from different vendors | SMARC modules can host low-power x86 as well as powerful Arm SoCs from different vendors |
| Support of embedded vision and IoT centric interface technology | SMARC modules support up to 4x camera inputs and 4x GbE with TSN as well as optional wireless communication | Future-oriented interface technology for an extra-long application lifecycle without bottlenecks in data transfer rates |
| Reliable connector technology | SMARC modules feature the common MXM 3.0 connector designed for dedicated graphics cards in notebooks | The 314 pin connector features a highly proven technology with a broad supporter base and cost-optimized market offerings for highest reliability and cost efficiency |
SMARC module positioning
SMARC 2.1 is perfectly positioned between the two well-established module standards Qseven and COM Express. Compared with the Qseven standard, SMARC offers more interfaces – especially embedded vision-oriented ports. Compared with the high-performance COM Express or even COM-HPC modules that make up the COM power class, SMARC 2.1 targets low-power applications that cannot be addressed by these performance-oriented standards with way higher power requirements.
SMARC 2.1 is perfectly positioned between the two well-established module standards Qseven and COM Express. Compared with the Qseven standard, SMARC offers more interfaces – especially embedded vision-oriented ports. Compared with the high-performance COM Express or even COM-HPC modules that make up the COM power class, SMARC 2.1 targets low-power applications that cannot be addressed by these performance-oriented standards with way higher power requirements.
| SMARC 2.1 module | Qseven | COM Express 3.1 Type 10 (Mini) | COM-HPC Mini | |
| Footprint | 82x50 mm | 70x70 mm | 40x70 mm (µQseven) | 84x55 mm | 95 x 70 mm |
| Construction height | 1.5 mm (module bottom to carrier board top) | 5 mm (module bottom to carrier board top) | 5 or 10 mm (module bottom to carrier board top) | 5 or 10mm (module bottom to Carrier Board top) |
| Power | 25 W | 12 W | 68 W | 76 W |
| Signal pins | 314 | 230 | 220 | 400 |
| PCIe¹ | 4x PCIe Gen 3 | 4x PCIe Gen 3 | 4x PCIe Gen 4 | 16 x PCIe Gen 5 |
| Graphics¹ | DP++/HDMI + 1x DP++ + 2x LVDS/eDP/MIPI DSI | eDP/HDMI + 2x LVDS | 1x DDI +1 LVDS/eDP | 3x DDi + 1x eDP |
| Sound | HDA + I2S | 1x HDA/I2S | 1x HDA/SoundWire | HDA, Soundwire, & I2S |
| Camera in¹ | 2x MIPI CSI + 2x MIPI CSI (connectors on module) | - | 2x MIPI CSI (connectors on module) | 2x MIPI CSI (connectors on module) |
| Ethernet¹ | 4x 1 GbE with TSN | 1x 1 GbE with TSN | 1x 1 GbE with TSN | 2x 10 GbitE with TSN + 2x 10 GbitE (SERDES) with TSN |
| Wireless | Antenna connector for WiFI & Bluetooth | Not supported | Not supported | Not supported |
| USB¹ | 2x USB 3.0 + 6x USB 2.0 | 2x USB 3.0 + 8x USB 2.0 | 2x USB 3.2 + 8x USB 2.0 | 4x USB 4.0, 4x USB 3.2 x1 / USB 3.2 x1 + 8x USB 2.0 |
| SATA¹ | 1x SATA Gen 3 | 2x SATA Gen 3 | 2x SATA Gen 3 | 2x SATA Gen 3 |
| CAN | 2x | 1x | 2x | 1x |
| UART | 4x | 1x | - | 2x |
| GPIO | 14x | 8x | 8x | 12x |
| Other | eSPI, SPI, I2C | SPI, LPC, I2C, SDI | LPC/eSPI | eSPI, 2x SPI, SMB, 2x I2C |
¹ Not all I/Os are available in parallel. Some pins are shared.
| SMARC 2.1 module | Qseven | COM Express 3.1 Type 10 (Mini) | COM-HPC Mini | |
| Footprint | 82x50 mm | 70x70 mm | 40x70 mm (µQseven) | 84x55 mm | 95 x 70 mm |
| Construction height | 1.5 mm (module bottom to carrier board top) | 5 mm (module bottom to carrier board top) | 5 or 10 mm (module bottom to carrier board top) | 5 or 10mm (module bottom to Carrier Board top) |
| Power | 25 W | 12 W | 68 W | 76 W |
| Signal pins | 314 | 230 | 220 | 400 |
| PCIe¹ | 4x PCIe Gen 3 | 4x PCIe Gen 3 | 4x PCIe Gen 4 | 16 x PCIe Gen 5 |
| Graphics¹ | DP++/HDMI + 1x DP++ + 2x LVDS/eDP/MIPI DSI | eDP/HDMI + 2x LVDS | 1x DDI +1 LVDS/eDP | 3x DDi + 1x eDP |
| Sound | HDA + I2S | 1x HDA/I2S | 1x HDA/SoundWire | HDA, Soundwire, & I2S |
| Camera in¹ | 2x MIPI CSI + 2x MIPI CSI (connectors on module) | - | 2x MIPI CSI (connectors on module) | 2x MIPI CSI (connectors on module) |
| Ethernet¹ | 4x 1 GbE with TSN | 1x 1 GbE with TSN | 1x 1 GbE with TSN | 2x 10 GbitE with TSN + 2x 10 GbitE (SERDES) with TSN |
| Wireless | Antenna connector for WiFI & Bluetooth | Not supported | Not supported | Not supported |
| USB¹ | 2x USB 3.0 + 6x USB 2.0 | 2x USB 3.0 + 8x USB 2.0 | 2x USB 3.2 + 8x USB 2.0 | 4x USB 4.0, 4x USB 3.2 x1 / USB 3.2 x1 + 8x USB 2.0 |
| SATA¹ | 1x SATA Gen 3 | 2x SATA Gen 3 | 2x SATA Gen 3 | 2x SATA Gen 3 |
| CAN | 2x | 1x | 2x | 1x |
| UART | 4x | 1x | - | 2x |
| GPIO | 14x | 8x | 8x | 12x |
| Other | eSPI, SPI, I2C | SPI, LPC, I2C, SDI | LPC/eSPI | eSPI, 2x SPI, SMB, 2x I2C |
¹ Not all I/Os are available in parallel. Some pins are shared.
The SMARC ecosystem
Design-in training Arm
Our Arm design training program provides a sound entry into the complex Arm world by introducing the Arm architecture, special bootloader requirements, and different Operating Systems including Yocto Project and Android. Hands-on training for setting up the hardware, booting a sample image, and BSP setup as well as a presentation of our Technical Service Center (TSC) and its services round off this 3-hour online training program.
Register
Carrier board design-in training
Our carrier board design training program shares best practice knowledge on how to design-in SMARC modules. The courses guide engineers through all the mandatory and recommended design essentials and best practice carrier board schematics. OEMs participating in the program will be able to efficiently simplify their carrier board design projects.
